Vahid Salmani [email protected] http://www.ece.uci.edu/~vsalmani/ SUMMARY Highly motivated Ph.D. with strong research and analytical skills in modeling, development, evaluation and optimization of operating/embedded/storage systems and network protocols. EDUCATION Ph.D. in Electrical and Computer Engineering University of California, Irvine (UCI), GPA: 4.0/4 Mar. 2008 – June 2013 Dissertation: Adaptive Multiple Access Communication for High Data Rate Wireless Sensing Applications M.Sc. in Software Engineering Sep. 2004 – Sep. 2007 Ferdowsi University of Mashhad (FUM), GPA: 18.9/20 (1st Rank in cumulative GPA among M.Sc. students graduated in 2007) Thesis: Multi-criteria Scheduling of Real-time Tasks on Uniform Multiprocessors B.Sc. in Software Engineering Sep. 2000 – Sep. 2004 Ferdowsi University of Mashhad (awarded outstanding student among 70 B.Sc. students graduated in 2004) R&D EXPERIENCE SK Hynix Memory Solutions Apr. 2014 – Present - Contributing to an NVM-based proof of concept prototype for datacenters. - Built a custom kernel, and ported a device driver for TCP/iSCSI protocol acceleration to Linux. Center for Embedded Computer Systems (CECS), UCI Mar. 2008 – June 2014 - Designed two novel MAC schemes for Eco, an ultra-compact distributed wireless sensing platform. - Introduced the “pre-pulling” technique that allows interleaved wireless transmissions by pipelining the sensor node operations. Improved bandwidth utilization 2.7 times. - Proposed one of the most lightweight adaptive MAC protocols, which requires no carrier sensing capability on nodes and can resiliently scale with variable network sizes. - Implemented a proof of concept prototype with a footprint as low as 4KB. MSC Software Nov. 2013 – Apr. 2014 - Contributed to the design of MSC Nastran's high performance common result database based on open source Big Data processing frameworks. STEC, Inc. – Office of the CTO (acquired by Western Digital) Nov. 2011 – Nov. 2012 - Designed and implemented a scalable NoSQL prototype optimized for Flash memory. - Contributed to the EnhanceIO SSD cache software in terms of performance analysis and optimization. - Performed micro-benchmarking to analyze file system call execution times for different eviction policies. IMEC, Belgium – Bioelectronic Systems Group June 2011 – Sep. 2011 - Investigated the support of GPU-based multi-threaded parallel image processing in Java. - Implemented parallel versions of morphological operations and spatial convolution in CUDA. - Optimized the parallelized algorithms to achieve the highest speedup. Achieved a speedup of at least 18x compared to the OpenMP based solution. Telecommunication and Computer Research Center, FUM Sep. 2005 – Sep. 2007 - Designed multi-criteria algorithms and heuristics for scheduling real-time tasks on multi-core and multiprocessor platforms. - Proposed a novel approach using processor affinity to reduce process migration overhead by a factor of 6. - Modified the Maximum Urgency First (MUF) scheduling algorithm to reduce task preemption and failure of non-critical tasks. TECHNICAL SKILLS Operating Systems: Windows, Linux (kernel- and user-level), Mac OS Parallel/Distributed Systems: DRBD, CUDA, POSIX Threads Big Data frameworks: Redis, HDF5, PyTables, Apache Lucene Programming: C, C++, Java, 8051 Assembly, Python, SQL Cross compilers: SDCC, Keil, CodeWarrior TEACHING EXPERIENCE University of California, Irvine (Teaching Assistant) Engineering Data Structures and Algorithms, Fall 2010. Object Oriented Systems and Programming (in Java), Spring 2009 and 2010. AWARDS AND HONORS Recipient of travel grants, to attend DCOSS’12 and MACOM’12. Visiting Scholarship, Katholieke Universiteit Leuven (KUL), Belgium. €3,700, April 2011. PhD admission with ORS award and UoB Postgraduate Research Scholarship, Department of Computer Science, University of Bristol, UK. £25,340 per year for three years, April 2008. PhD admission with tuition grant and assistantship, Department of Computer Science, University of North Carolina at Chapel Hill, NC. $26,020 plus Graduate Student Tuition Grant for one year, April 2007. PhD admission with fellowship, Department of Electrical Engineering and Computer Science, University of California, Irvine, CA. $40,702 for one year, February 2007. Ranked 110th, among 8,000 graduates participating in the nationwide M.Sc. program entrance exam, Iran, April 2004. Winner of the ACM Programming Contest, the selective competition for participation in the ACM Regional Collegiate Programming Contest, FUM, 2002 and 2004. 1st place of the National Soccer Simulation Competition, held in conjunction with the 5th Conference on Intelligent Systems, Mashhad, Iran, October 2003. REVIEWER SERVICE IEEE Transactions on Mobile Computing IEEE Transactions on Industrial Informatics Design Automation for Embedded Systems, Springer International Journal of Sensor Networks, Inderscience ACM/EDAC/IEEE Design Automation Conference (DAC) ACM/IEEE/IEICE Asia and South Pacific Design Automation Conference (ASPDAC) ACM/IEEE International Conference on Information Processing in Sensor Networks (IPSN) SELECT PUBLICATIONS • V. Salmani, P. H. Chou, “Resilient Round Robin: A Lightweight Deterministic MAC Primitive”, in ACM Transactions on Sensor Networks (TOSN), Vol 11, No. 2, Article 31, December 2014. • G. Kurczina, V. Salmani, D. Prodanov, “Comparison of Parallelized Gray-scale Zonal Operations on CPU and GPU”, Neuroinformatics, INCF Congress, August 2013. • V. Salmani, P. H. Chou, “Intra-Cluster Contention Resolution in Wireless Sensor Networks”, the 5th Intl. Workshop on Multiple Access Communications (MACOM), LNCS, Vol. 7642, November 2012. • V. Salmani, P. H. Chou, “Bin-MAC: A Hybrid MAC for Ultra-Compact Wireless Sensor Nodes”, the 8th IEEE Intl. Conf. on Distributed Computing in Sensor Systems (DCOSS), May 2012. • V. Salmani, G. Kurczina, D. Prodanov, “CUDA-Based Massively Parallel Implementation of Gray-Scale Mathematical Morphology Operations in Java”, Bioimage Analysis Workshop, EURO-BIOIMAGING, April 2012. • V. Salmani, P. H. Chou, “Pushing the Throughput Limit of Low-Complexity Wireless Embedded Sensing Systems”, the 3rd IEEE Intl. Conf. on Sensor Networks, Ubiquitous and Trustworthy Computing (SUTC), June 2010. • V. Salmani, M. Naghibzadeh, M. Kahani, “Deadline Scheduling with Processor Affinity and Feasibility Check on Uniform Parallel Machines”, the 7th IEEE Intl. Conf. on Computer and Information Technology, October 2007. • A. M. Fard, V. Salmani, et. al., “Game Theory based Data Mining Technique for Strategy Making of a Soccer Simulation Coach Agent”, Lecture Notes in Informatics (LNI), vol. P-107, May 2007. • V. Salmani, M. Naghibzadeh, A. Habibi, H. Deldari, “Quantitative Comparison of Job-level Dynamic Scheduling Policies in Parallel Real-time Systems”, IEEE Region 10 Conference (TENCON), November 2006. • V. Salmani, S. T. Zargar, M. Naghibzadeh, “A Modified Maximum Urgency First Scheduling Algorithm for Real-Time Tasks”, Enformatika Transactions on Engineering, Computing and Technology, Vol. 9, November 2005.
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